|Oct 20, 2014||Severity: Information||Eugeny Brychkov (RU), Ricardo Cancho Niemietz (ES) (YJK testing)|
I have got questions and requests if GR8BIT can be upgraded to the full MSX2+ standard, and I was resisting responding unconsciously "protecting" the design of the Direct Video Memory Access (DVMA) functionality.
The truth is that there're no applications that use my developed DVMA, it is just one of the features, which I positioned as a study for myself, for those who assemble and study the GR8BIT and digital electronics in overall.
And I decided to give my friends the guide upgrading their GR8BIT if they want to instead of trying to secure unused feature.
But before you run for the modification, please read about functional enhancements and our test of the YJK coding system on the real photo.
Running ahead I want to say that upgrading appeared to be extremely simple.
Let's consider pin by pin as they are connected in the GR8BIT:
|4||VDS||O||VRESET||I||Connected to the DVMA circuit and pulled up. With V9958 input gets high level, and DVMA circuit is inactive due to no changes in this signal's level. For description of how DVMA works see GR8BOOK Part I chapter 6.3.|
|5||HSYNC||I/O||HSYNC||O||Both signals are now binary (only two levels - high and low). Logically middle level now became low, and Q4 and Q10 transistors act as DC-voltage followers and they do not saturate.|
|8||CPUCLK||O||CPUCLK/VDS||O||By default pin is CPUCLK, and no change is required.|
|21||VIDEO||O||VDD/DAC||I||For V9938 configuration this pin is output pulled down through 1K resistor. For V9958 it should be connected to +5V power rail.|
|26||LPS||I||WAIT||O||By default wait functionality is disabled, pin pulled up.|
|27||LPD||I||HRESET||I||Input, in GR8BIT is pulled up.|
There're no many changes in functionality, however in some implementations they are considered as important. They include:
Warning: after you perform described modifications, do not put original V9938 VDP back into the socket. Otherwise VDP's output circuits will be destroyed and chip will become unusable.
The only required modification is to supply +5 volts power to the VDD/DAC power input of the V9958. Do not forget to re-install VDP's heat sink.
You connect pin 21 of the VDP to the emitter of the Q10 located nearby. Take precautions regarding the static electricity, or perform modifications with VDP not inserted.
Note that if you upgrade permanently you may consider doing the following actions:
YJK mode is enabled in all new SCREEN modes 10, 11 and 12; YAE is reset in SCREEN 12 mode. We will consider full-YJK testing (SCREEN 12 mode).
The picture above shows capabilities of the V9938 graphics subsystem in YJK mode. While clown is displayed with very colorful palette, the picture is severely distorted in the places where colors significantly change (picture to the right).
In the code in Appendix 1 we deliberately used floating point division and then addition before taking integer part of Y component to smooth the transition of the colors within 4-pixel cells, this trick does not help for smoothing between these 4-pixel cells.
Given horizontal resolution of the V9958's screen (256 dots) and sizes of the modern displays the 4-pixel cells have huge area size on the screen, and distortions are very visible. We assume this fact is one of the reasons why this implementation of the YJK coding system was not widely used and was not brought forward. Please note that putting pixels into the cells (grouping them by some attribute) is widely used in JPEG algorithms, however JPEG can operate with hundreds and thousands of the horizontal pixels, having single pixel relatively small for eye to see the resulting distortion.
With very high degree of probability you will need to implement KB0005 modifications to display images in SCREEN modes 10, 11 and 12 properly because these modes are based on the SCREEN 8 mode (G7).
Note: scan line length is 256 pixels (768 bytes of the data, no opacity byte)
End of DN0004 "Installing V9958 into your GR8BIT".
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